In a current communications system, an intermediate bus architecture (IBA) is used in most power supplies, because the IBA makes up for shortcomings of a distributed power architecture (DPA).
The IBA allocates isolation, voltage transformation, and voltage regulation functions of a DC-DC power module to two components, where the two components are an intermediate bus converter (IBC) and a non-isolation point-of-load (niPoL) converter.
The IBC has the voltage regulation and isolation functions. The niPoL provides the voltage regulation function.
The IBC converts a voltage at a distribution bus at which a voltage is half regulated to a voltage (which generally is 12 volts (V)) of an isolated intermediate bus at which a voltage is not regulated, and supplies power to a chain of niPoLs.
The niPoL is close to a load and provides the voltage transformation and voltage regulation functions.
A principle of the IBA is to reduce a voltage of a bus to a voltage which is slightly higher than that of a point-of-load, and the rest of work is done by a niPoL which is cheaper.
Therefore, compared with the DPA, the IBA enjoys advantages of low costs and dynamic features, thereby becoming a mainstream power supply architecture in the current communications system.
With strengthening of a board service capability, an increasing number of conversion modules based on a point-of-load (POL) power supply are supplied, and power is increasingly high, but an area of a circuit board remains unchanged or even shrinks, which imposes an increasingly high requirement on efficiency of an IBA power supply.
Referring to FIG. 1, FIG. 1 is a schematic diagram of an IBA topology provided in the prior art.
A working mode with an almost 50% fixed duty cycle is used in this IBA topology. That is, in a previous half period of an input voltage Vin, a first switching transistor Q1 and a third switching transistor Q3 are conducted simultaneously with a sixth switching transistor Q6 at the almost 50% fixed duty cycle, and in a later half period of the Vin, a second switching transistor Q2 and a fourth switching transistor Q4 are conducted with a fifth switching transistor Q5 at the almost 50% fixed duty cycle symmetrically with the previous half period.
In this working mode, all of the switching transistors (Q1-Q6) can achieve zero voltage switch (ZVS) conduction, so as to reduce switch loss, and meanwhile because no additional filter inductor is required for output, copper loss and iron loss of the filter inductor can also be reduced, so that conversion efficiency of the whole topology can be the best. This working manner, in which a duty cycle of the switching transistors is not controlled by a loop, is also called open-loop control.
Although the open-loop control with a fixed duty cycle can achieve high-efficiency power conversion, because an output voltage is uncontrollable by the open-loop control, adjustment of the output voltage is inevitably worsened.